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 APA2178
100mW Stereo Cap-Free Headphone Driver
Features
General Description
The APA2178 is a stereo, fixed gain, Cap-Free headphone driver which is available in a WLCSP2x2-16 package. The APA2178 is a ground-reference output, and doesn' t need the output capacitors for DC blocking. The advantages of eliminating the output capacitor are saving the cost, PCB' space, and component height. s The built-in gain setting can minimize the external component counts and save the PCB space. High PSRR provides increased immunity to noise and RF rectification. In addition to these features, a fast startup time and small package size make the APA2178 an ideal choice for portable multimedia device. Moreover, the APA2178 is also equipped other features. For example, it is capable of driving 100mW at 3.3V into 16, at THD+N=10% and provides thermal and short circuit protection.
* * * * * *
No Output Capacitor Required Operating Voltage: 1.8V~4.5V Supply Current - IDD=5mA at VDD=3.3V Low Shutdown Current - IDD=1A at VDD=3.3V Meeting VISTA Requirements Output Power at 1% THD+N - 70mW, at VDD=3.3V, RL = 16 at 10% THD+N - 100mW, at VDD=3.3V, RL = 16 Less External Components Required High PSRR: 78dB at 217Hz Short-Circuit and Thermal Protection 8KV ESD Performance Surface-Mount Packaging - WLCSP2x2-16 Lead Free and Green Devices Available (RoHS Compliant)
* * * * * *
Applications
* * * *
Handsets PDAs Portable multimedia devices Notebooks
Simplified Application Circuit
R-CH Input RIN
ROUT L-CH Input LIN
Stereo Headphone
APA2178
LOUT Shutdown Control RSD LSD
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009 1 www.anpec.com.tw
APA2178
Ordering and Marking Information
APA2178 Assembly Material Handling Code Temperature Range Package Code AP78 X Package Code HA : WLCSP2x2-16 Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Assembly Material G : Halogen and Lead Free Device
APA2178 HA :
X - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020C for MSL classification at lead-free peak reflow temperature. ANPEC defines "Green" to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).
Pin Configuration
CP+ (A4)
PGND (B4)
CP(C4)
CVSS (D4)
PVDD (A3)
NC (B3)
NC (C3)
VSS (D3)
GND (A2)
LSD (B2)
ROUT (C2)
LOUT (D2)
RIN (A1)
RSD (B1)
LIN (C1)
VDD (D1)
X
Marking PIN A1
Date Code
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Absolute Maximum Ratings
Symbol VPVDD_VDD VPGND_GND PVDD, VDD VRSD, VLSD VSS, CVSS VROUT, VLOUT VCP+ VCPTA TJ TSTG TSDR PD PVDD to VDD Voltage PGND to GND Voltage Supply Voltage (VDD and PVDD to GND and PGND) Input Voltage (RSD and LSD to GND) VSS and CVSS to GND and PGND Voltage ROUT and LOUT to GND Voltage CP+ to PGND Voltage CP- to PGND Voltage Operating Ambient Temperature Range Maximum Junction Temperature Storage Temperature Range Maximum Soldering Temperature Range, 10 Seconds Power Dissipation
(Note 1)
(Over operating free-air temperature range unless otherwise noted.)
Parameter Rating -0.3 to 0.3 -0.3 to 0.3 -0.3 to 5.5 GND-0.3 to VDD+0.3 -5.5 to 0.3 VSS-0.3 to VDD+0.3 PGND-0.3 to PVDD+0.3 PVSS-0.3 to PGND+0.3 -40 to 85 150 -65 to +150 260 Internally Limited Unit V V V V V V V V

C
C C

C
W
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol JA Parameter Junction-to-Ambient Resistance in Free Air
(Note 2)
Typical Value WLCSP2x2-16 160
Unit
o
C/W
Note 2: Please refer to "Thermal Pad Consideration". 2 layered 5 in2 printed circuit boards with 2oz trace and copper through several thermal vias. The thermal pad is soldered on the PCB.
Recommended Operating Conditions (Note 3)
Symbol VDD VIH VIL VICM TA TJ RL Supply Voltage High Level Threshold Voltage Low Level Threshold Voltage Common Mode Input Voltage Ambient Temperature Junction Temperature Headphone Resistance RSD, LSD RSD, LSD Parameter Range 1.8 ~ 4.5 0.6VDD ~ VDD 0 ~ 0.3VDD ~ VDD-0.5 -40 ~ 85 -40 ~ 125 14 ~ Unit V V V V
o o
C
C
Note 3 : Refer to the typical application circuit.
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Electrical Characteristics
Unless otherwise specified, these specifications apply over VDD=PVDD=3.3V, VPGND=VGND=0V, and CCPO=CCPF=1F. Typical values are at TA=25oC.
Symbol VDD IDD ISD Ii Parameter Supply Voltage Supply Current Shutdown Current Input Current RSD =LSD= 0V RSD, LSD Test Conditions Min. 1.8 AP2178 Typ. 5 1 0.1 Max. 4.5 10 2 V mA A A Unit
CHARGE PUMP Switching Frequency Charge Pump Requirement Req Resistance POWER-ON-RESET Rising VDD Threshold Falling VDD Threshold AMPLIFIERS AV AV Ri SR VOS Vn Internal Voltage Gain Gain Match Input Resistance Slew Rate Output Offset Voltage Noise Output Voltage VDD=1.8V to 4.5V,Vrr=200mVrms PSRR Power Supply Rejection Ratio fin= 217Hz fin=1kHz fin= 20kHz CL Tstart-up OUTR, OUTL Maximum Capacitive Load Start-up Time ESD Protection 78 75 55 400 120 8 pF s kV dB VDD=1.8V to 4.5V, RL = 32 No Load -1.55 12 -5 -1.5 1 14 2.5 15 -1.45 16 5 V/V % k V/s mV Vrms FOSC 440 6 520 7 580 9 kHz
1.67 1.57
1.7 1.6
1.73 1.63
V V
VDD=4.5V, TA=25X C THD+N = 1%, fin=1kHz RL = 16 PO Output Power (Stereo, in Phase) RL = 32 THD+N = 10%, fin=1kHz RL = 16 RL = 32 fin = 1kHz PO = 105mW, RL = 16 THD+N Total Harmonic Distortion Pulse Noise PO = 100mW, RL = 32 VO = 2.2Vrms, RL = 300 VO = 2.2Vrms, RL = 10k 0.03 0.02 0.005 0.003 % 180 215 205 120 150 145 mW
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VDD=PVDD=3.3V, VPGND=VGND=0V, and CCPO=CCPF=1F. Typical values are at TA=25oC.
Symbol VDD=4.5V, TA=25X (CONT.) C fin = 1kHz PO = 15mW, RL = 16 Crosstalk Channel Separation PO = 15mW, RL = 32 VO = 0.31Vrms, RL = 300 VO = 0.31Vrms, RL = 10k With A-weighting Filter S/N Signal-to-Noise Ratio PO = 100mW, RL = 32 VO = 3.1Vrms, RL = 10k VDD=3.3V, TA=25X C THD+N = 1%, fin=1kHz RL = 16 PO Output Power (Stereo, in Phase) RL = 32 THD+N = 10%, fin=1kHz RL = 16 RL = 32 fin = 1kHz PO = 50mW, RL = 16 THD+N Total Harmonic Distortion Pulse Noise PO = 50mW, RL = 32 VO = 1.6Vrms, RL = 300 VO = 1.6Vrms, RL = 10k fin = 1kHz PO = 7mW, RL = 16 Crosstalk Channel Separation PO = 7mW, RL = 32 VO = 0.23Vrms, RL = 300 VO = 0.23Vrms, RL = 10k With A-weighting Filter S/N Signal-to-Noise Ratio PO = 50mW, RL = 32 VO = 2.3Vrms, RL = 10k VDD=1.8V, TA=25X C THD+N = 1%, fin=1kHz PO Output Power (Stereo, in Phase) RL = 32 THD+N = 10%, fin=1kHz RL = 32 fin = 1kHz THD+N Total Harmonic Distortion Pulse Noise PO = 9mW, RL = 32 VO = 0.85Vrms, RL = 300 VO = 0.85Vrms, RL = 10k 0.03 0.007 0.005 % 15 20 10 13 mW 95 100 dB 75 85 95 95 dB 0.03 0.02 0.005 0.003 % 80 100 100 55 70 70 mW 100 105 dB 75 80 95 100 dB Parameter Test Conditions APA2178 Min. Typ. Max. Unit
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VDD=PVDD=3.3V, VPGND=VGND=0V, and CCPO=CCPF=1F. Typical values are at TA=25oC.
Symbol VDD=1.8V, TA=25X (CONT.) C
Parameter
Test Conditions
APA2178 Min. Typ. Max.
Unit
fin = 1kHz Crosstalk Channel separation PO = 1.3mW, RL = 32 VO = 0.12Vrms, RL = 300 VO = 0.12Vrms, RL = 10k With A-weighting Filter S/N Signal-to-Noise Ratio PO = 9mW, RL = 32 VO =1.2Vrms, RL = 10k 95 95 dB 80 85 90 dB
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics
THD+N vs. Output Voltage
10 VDD=4.5V fin=1kHz Cin=1F BW<80kHz
THD+N vs. Output Power
10 VDD=4.5V RL=16 Cin=1F BW<80kHz fin=20kHz
1 THD+N (%)
1
0.1 RL=32 RL=16
THD+N (%)
0.1 fin=1kHz
0.01
RL=300 RL=10k 3 4
0.001
0 500m
1 2 Output Voltage (V)
0.01
fin=20Hz 1m 10m 100m 600m Output Power (W)
THD+N vs. Output Power
10 VDD=4.5V fin=1kHz RL=16 Cin=1F BW<80kHz Stereo, in Phase 0.1 Mono
THD+N vs. Frequency
10 VDD=4.5V RL=16 Cin=1F PO=105mW BW<22kHz
1 THD+N (%)
Stereo, 180o out of Phase
1 THD+N (%)
0.1 Left Channel Right Channel 0.01
0.01
0
70m
140m
210m
280m
350m
0.006
20
100
Output Power (W)
1k Frequency (Hz)
10k 20k
Crosstalk vs. Frequency
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 20 100 1k Frequency (Hz) 10k 20k
1
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
Crosstalk (dB)
VDD=4.5V RL=16 Cin=1F PO=15mW BW<80kHz
10
Left to Right Right to Left
VDD=4.5V RL=16 Cin=1F A-Weighting 20 100 1k Frequency (Hz) 10k 20k
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
THD+N vs. Output Power
10 VDD=4.5V RL=32 Cin=1F BW<80kHz 1 THD+N (%) fin=20kHz
THD+N (%) 1 10
THD+N vs. Output Power
VDD=4.5V fin=1kHz RL=32 Cin=1F BW<80kHz Stereo, in Phase 0.1 Mono
Stereo, 180o out of Phase
0.1 fin=1kHz fin=20Hz 1m 10m Output Power (W) 100m 300m
0.01
0.01
0
70m
140m 210m 280m Output Power (W)
350m
THD+N vs. Frequency
10 VDD=4.5V RL=32 Cin=1F 1 PO=100mW BW<22kHz
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120
Crosstalk vs. Frequency
VDD=4.5V RL=32 Cin=1F PO=15mW BW<80kHz
0.1 Left Channel 0.01 Right Channel 0.001 20 100 1k Frequency (Hz) 10k 20k
Crosstalk (dB)
THD+N (%)
Left to Right Right to Left
20
100
1k Frequency (Hz)
10k 20k
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
THD+N vs. Output Voltage
10 VDD=4.5V RL=300 Cin=1F BW<80kHz
1
10
THD+N (%)
0.1
fin=20kHz
VDD=4.5V RL=32 Cin=1F A-Weighting 1 20 100 1k Frequency (Hz) 10k 20k
0.01
fin=1kHz fin=20Hz 0 800m 1.6 2.4 3.2 4 Output Voltage (V)
0.001
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
THD+N vs. Output Power
10 VDD=4.5V RL=300 Cin=1F VO=2.2Vrms BW<22kHz
+0 -10 -20 -30 -40 -50 -60
Crosstalk vs. Frequency
VDD=4.5V RL=300 Cin=1F VO=0.31Vrms BW<80kHz
1 THD+N (%)
0.1
Crosstalk (dB)
0.01
Left Channel Right Channel 20 100 1k Frequency (Hz) 10k 20k
-70 -80 -90 -100 -110 -120 20 100
Left to Right Right to Left 1k Frequency (Hz) 10k 20k
0.001
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
THD+N vs. Output Voltage
10 VDD=4.5V RL=10k Cin=1F BW<80kHz
1
10
THD+N (%)
0.1 fin=20kHz
VDD=4.5V RL=300 Cin=1F A-Weighting 1 20 100 1k Frequency (Hz) 10k 20k
0.01
fin=1kHz
0.001
fin=20Hz 0 800m 1.6 2.4 Output Voltage (V) 3.2 4
THD+N vs. Frequency
10 1 VDD=4.5V RL=10k Cin=1F VO=2.2Vrms BW<22kHz
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120
Crosstalk vs. Frequency
VDD=4.5V RL=10k Cin=1F VO=0.31Vrms BW<80kHz
THD+N (%)
0.1
0.01 Left Channel 0.001 Right Channel
Crosstalk (dB)
Left to Right Right to Left 20 100 1k Frequency (Hz) 10k 20k
0.0001
20
100
1k Frequency (Hz)
10k 20k
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
THD+N vs. Output Voltage
10 VDD=3.3V fin=1kHz Cin=1F BW<80kHz RL=32 0.1 RL=16
1
10
VDD=4.5V RL=10k Cin=1F A-Weighting 1 20 100 1k Frequency (Hz) 10k 20k
THD+N (%)
0.01
RL=300 RL=10k 0 500m 1 1.5 2 2.5 3 Output Voltage (V)
0.001
THD+N vs. Output Power
10 VDD=3.3V RL=16 Cin=1F BW<80kHz
THD+N (%) 10
THD+N vs. Output Power
VDD=3.3V fin=1kHz RL=16 Cin=1F BW<80kHz Stereo, in Phase Stereo, 180o out of Phase Mono
1 THD+N (%) fin=20kHz
1
0.1 fin=1kHz
0.1
0.01 1m
fin=20Hz 10m Output Power (W) 100m 300m
0.01
0
40m
80m 120m Output Power (W)
160m
200m
THD+N vs. Frequency
10 VDD=3.3V RL=16 Cin=1F PO=50mW BW<22kHz
Crosstalk vs. Frequency
+0 -10 VDD=3.3V RL=16 -20 Cin=1F -30 P =7mW O -40 BW<80kHz -50 -60 -70 -80 -90 -100 -110 -120 20 Left to Right Right to Left
1
THD+N (%)
0.1
0.01 Left Channel 0.001 Right Channel
0.0001
Crosstalk (dB)
20
100
1k Frequency (Hz)
10k 20k
100
1k Frequency (Hz)
10k 20k
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
10
THD+N vs. Output Power
VDD=3.3V RL=32 Cin=1F BW<80kHz
1
10
THD+N (%)
fin=20kHz 0.1 fin=20Hz fin=1kHz
VDD=3.3V RL=16 Cin=1F A-Weighting 1 20 100 1k Frequency (Hz) 10k 20k
0.01
1m
10m Output Power (W)
100m 200m
THD+N vs. Output Power
10 VDD=3.3V fin=1kHz RL=32 Cin=1F BW<80kHz Stereo, in Phase 0.1 Stereo, 180o out of Phase Mono
THD+N vs. Frequency
10 VDD=3.3V RL=32 Cin=1F PO=50mW BW<22kHz
1 THD+N (%)
1 THD+N (%)
0.1 Left Channel 0.01 Right Channel
0.01
0
40m 80m 120m Output Power (W)
160m
0.001
20
100
1k Frequency (Hz)
10k 20k
Crosstalk vs. Frequency
+0 VDD=3.3V -10 RL=32 -20 C =1F in -30 PO=7mW -40 BW<80kHz -50 -60 -70 -80 -90 -100 -110 -120 20 100 1k Frequency (Hz) 10k 20k Left to Right Right to Left
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
Crosstalk (dB)
10
VDD=3.3V RL=32 Cin=1F 1 A-Weighting 20 100
1k
10k 20k
Frequency (Hz)
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
THD+N vs. Output Voltage
10 VDD=3.3V RL=300 Cin=1F 1 BW<80kHz
THD+N (%) 10
THD+N vs. Frequency
VDD=3.3V RL=300 Cin=1F VO=1.6Vrms BW<22kHz
1
THD+N (%)
0.1
fin=20Hz
0.1
0.01
fin=1kHz fin=20kHz 0 600m 1.2 1.8 2.4 3 Output Voltage (V)
0.01
Left Channel Right Channel 20 100 1k Frequency (Hz) 10k 20k
0.001
0.001
Crosstalk vs. Frequency
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 20 100 1k Frequency (Hz) 10k 20k
1
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
Crosstalk (dB)
VDD=3.3V RL=300 Cin=1F VO=0.23Vrms BW<80kHz
10
Left to Right Right to Left
VDD=3.3V RL=300 Cin=1F A-Weighting 20 100 1k Frequency (Hz) 10k 20k
THD+N vs. Output Voltage
10 VDD=3.3V RL=10k Cin=1F BW<80kHz
THD+N vs. Frequency
10 VDD=3.3V RL=10k Cin=1F 1 V =1.6Vrms O BW<22kHz
1 THD+N (%)
THD+N (%)
0.1
0.1
0.01
fin=20kHz fin=1kHz
0.01 Left Channel 0.0006 20 100 Right Channel 1k Frequency (Hz) 10k 20k
0.001
fin=20Hz 0 600m 1.2 1.8 2.4 3 Output Voltage (V)
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
Crosstalk vs. Frequency
+0 VDD=3.3V -10 R =10k -20 CL =1F in -30 VO=0.23Vrms -40 BW<80kHz -50 -60 -70 -80 -90 -100 -110 -120 20 100
50 Output Noise Voltage (Vrms)
Output Noise Voltage vs. Frequency
Crosstalk (dB)
10
Left to Right Right to Left 1k Frequency (Hz) 10k 20k
VDD=3.3V RL=10k Cin=1F 1 A-Weighting 20 100 1k Frequency (Hz)
10k 20k
THD+N vs. Output Voltage
10 VDD=1.8V fin=1kHz Cin=1F BW<80kHz
THD+N vs. Output Power
10 VDD=1.8V RL=32 Cin=1F BW<80kHz 1 THD+N (%) fin=20kHz
1 THD+N (%)
RL=300 0.1 RL=32 0.01
0.1 fin=1kHz fin=20Hz
0.001 0
RL=10k 400m 800m 1.2 Output Voltage (V) 1.6
0.01
1m
10m Output Power (W)
60m
THD+N vs. Output Power
10 VDD=1.8V fin=1kHz RL=32 Cin=1F 1 BW<80kHz Stereo, in Phase 0.1 Stereo, 180o out of Phase Mono
THD+N (%) 10
THD+N vs. Frequency
VDD=1.8V RL=32 Cin=1F PO=9mW BW<22kHz
1
THD+N (%)
0.1 Left Channel 0.01 Right Channel
0.01
0
6m
12m 18m 24m Output Power (W)
30m
36m
0.001
20
100
1k Frequency (Hz)
10k 20k
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
Crosstalk vs. Frequency
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 20 100 1k Frequency (Hz) 10k 20k VDD=1.8V RL=32 Cin=1F PO=1.3mW BW<80kHz
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
Crosstalk (dB)
10
Left to Right Right to Left
VDD=1.8V RL=32 Cin=1F A-Weighting 1 20 100 1k Frequency (Hz) 10k 20k
THD+N vs. Output Voltage
10 VDD=1.8V RL=300 Cin=1F 1 BW<80kHz fin=20kHz
THD+N vs. Frequency
10 VDD=1.8V RL=300 Cin=1F VO=0.85Vrms BW<22kHz
1 THD+N (%)
THD+N (%)
0.1
0.1
0.01
fin=1kHz fin=20Hz
0.01
Left Channel Right Channel
0.001
0
300m
600m
0.9
1.2
1.5
0.001
20
100
Output Voltage (V)
1k Frequency (Hz)
10k 20k
Crosstalk vs. Frequency
+0 VDD=1.8V -10 RL=300 -20 C =1F in -30 VO=0.1Vrms -40 BW<80kHz -50 -60 -70 -80 -90 -100 -110 -120 20 100 1k Frequency (Hz) 10k 20k
Output Noise Voltage vs. Frequency
50 Output Noise Voltage (Vrms)
Crosstalk (dB)
10
Left to Right Right to Left
1
VDD=1.8V RL=300 Cin=1F A-Weighting 20 100 1k Frequency (Hz) 10k 20k
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
THD+N vs. Output Voltage
10 VDD=1.8V RL=10k Cin=1F 1 BW<80kHz
THD+N vs. Frequency
10 VDD=1.8V RL=10k Cin=1F VO=0.85Vrms BW<22kHz
1 THD+N (%)
THD+N (%)
0.1
0.1
0.01
fin=20kHz fin=1kHz
0.01 Left Channel
1.2 1.5
0.001
fin=20Hz 0 300m 600m 0.9
0.001
20
100
Output Voltage (V)
Right Channel 1k Frequency (Hz)
10k 20k
Crosstalk vs. Frequency
+0 -10 -20 -30 -40 -50 -60 VDD=1.8V RL=10k Cin=1F VO=0.12Vrms BW<80kHz
50 Output Noise Voltage (Vrms)
Output Noise Voltage vs. Frequency
Crosstalk (dB)
10
-70 -80 -90 -100
Left to Right Right to Left 20 100 1k Frequency (Hz) 10k 20k
-110 -120
1
VDD=1.8V RL=10k Cin=1F A-Weighting 20 100 1k Frequency (Hz) 10k 20k
Frequency Response
+6 +5 +4 Gain (dB) +3 +2 +1 +0 VDD=3.3V RL=32 Cin=1F PO=10mW BW<80kHz Gain +210 +190 +170 +150 200k +270 +250 +230 Phase (Deg)
Gain (dB) +6
Frequency Response
VDD=3.3V RL=10k +5 C =1F in VO=0.23Vrms +4 BW<80kHz +3 +2 +1 +0 +270 +250 Gain +230 +210 +190 +170 +150 Phase (Deg)
Phase
Phase
10
100
1k 10k Frequency (Hz)
10
100
1k 10k Frequency (Hz)
200k
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
Input Voltage vs. Output Voltage
2.5 VDD=3.3V RL=16 fin=1kHz Cin=1F 3 Mono Iutput Voltage (Vrms)
Input Voltage vs. Output Voltage
VDD=3.3V RL=10k fin=1kHz Cin=1F Mono Stereo, in Phase
2 Iutput Voltage (Vrms)
2.4
1.5
Stereo, in Phase
1.8
1
1.2
500m
600m
0
0
500m 1 1.5 Output Voltage (Vrms)
2
2.5
0 0
600m 1.2 1.8 2.4 Output Voltage (Vrms)
3
PSRR vs. Frequency
+0 -10 -20 -30 PSRR (dB) PSRR (dB) -40 -50 -60 -70 -80 -90 -100 20 Right Channel 100 1k Frequency (Hz) 10k 20k Left Channel VDD=3.3V RL=16 Cin=1F Vrr=200mVrms +0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 20
PSRR vs. Frequency
VDD=3.3V RL=10k Cin=1F Vrr=200mVrms
Left Channel Right Channel 100 1k Frequency (Hz) 10k 20k
Supply Current vs. Supply Voltage
6 No Load 5
Shutdown Current vs. Supply Voltage
2.0 RSD=LSD=GND No Load Shutdown Current (A) 1.5
Supply Current (mA)
4 3 2 1 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Supply Voltage (V)
1.0
0.5
0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Supply Voltage (V)
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
Power Dissipation vs. Output Power
300 250 Power Dissipation (mW) 200 150 100 50 0 0 50 RL=32 VDD=4.5V fin=1kHz Cin=1F Mono 100 150 200 250 300 350 400 Output Power (mW) RL=16
Power Dissipation vs. Output Power
175 150 Power Dissipation (mW) RL=16 125 100 75 RL=32 50 25 0 0 25 VDD=3.3V fin=1kHz Cin=1F Mono 50 75 100 125 150 175 200 Output Power (mW)
Power Dissipation vs. Output Power
50
200
Output Power vs. Load Resistance
Mono THD+N=10% Mono THD+N=1% VDD=3.3V fin=1kHz Cin=1F BW<80kHz
Power Dissipation (mW)
40
Output Power (mW) 150
30 RL=32 VDD=1.8V fin=1kHz Cin=1F Mono 0 10 20 30 40 Output Power (mW) 50 60
Stereo, in Phase THD+N=10% 100
20
10 0
50 Stereo, in Phase THD+N=1% 0 10 100 Load Resistance () 1000
Output Power vs. Load Resistance & Charge Pump Capacitance
CCPFG Charge Pump flying capacitor CCPOG Charge Pump output capacitor CCPF=CCPO=2.2F 80 CCPF=CCPO=1F CCPF=CCPO=0.68F 60 CCPF=CCPO =0.47F 40 V =3.3V DD fin=1kHz Cin=1F 20 BW<80kHz THD+N=10% 0 Stereo, in Phase 10 100 Load Resistance ()
Load Resistance () 15
Charge Pump Output Resistance vs. Supply Voltage
12
Output Power (mW)
9
6
3
1000
0 1.8 2.1 2.4 2.7 3.0 3.3 3.6 3.9 4.2 4.5 Supply Voltage (V)
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Typical Operating Characteristics (Cont.)
GSM Power Supply Rejection vs. Frequency
Supply Voltage (dBV) +0 -50 -100 Output Voltage (dBV) +0 -50
2 1 VDD
GSM Power Supply Rejection vs. Time
-150
VROUT
-100 -150
0
400
800
1.2k
1.6k
2k
Frequency (Hz)
CH1: VDD, 500mV/Div, DC, V DD Offset=3.3V CH2: VROUT, 20mV/Div, DC TIME: 20ms/Div
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APA2178
Operating Waveforms
Output Transient at Turn On Output Transient at Turn Off
VDD 1
VDD 1
VROUT 2
VROUT 2
CH1: VDD, 2V/Div, DC CH2: VROUT, 20mV/Div, DC TIME: 20ms/Div
CH1: VDD, 2V/Div, DC CH2: VROUT, 20mV/Div, DC TIME: 200ms/Div
Output Transient at Shutdown Release
Output Transient at Shutdown Active
RSD
RSD
1
1
VROUT
2
VROUT
2
CH1: RSD, 2V/Div, DC CH2: VROUT, 20mV/Div, DC TIME: 20ms/Div
CH1: RSD, 2V/Div, DC CH2: VROUT, 20mV/Div, DC TIME: 20ms/Div
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APA2178
Operating Waveforms (Cont.)
Shutdown Release
RSD
1
2
VROUT
CH1: VDD, 2V/Div, DC CH2: VROUT, 1V/Div, DC TIME: 200s/Div
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APA2178
Pin Description
PIN I/O/P NO. A1 A2 A3 A4 B1 B2 B3,C3 B4 C1 C2 C4 D1 D2 D3 D4 MANE RIN GND PVDD CP+ RSD LSD NC PGND LIN ROUT CPVDD LOUT VSS CVSS I P P I/O I I P I O I/O P O P O Right channel audio signal input pin. Ground connection for circuitry. Charge pump power supply voltage input pin. Charge pump flying capacitor positive connection. Right channel shutdown mode control pin. A low-level voltage applied on this pin shuts off the right channel headphone driver. Left channel shutdown mode control pin. A low-level voltage applied on this pin shuts off the left channel headphone driver. No Connection. Charge pump ground. Left channel audio signal input pin. Right channel output for headphone. Charge pump flying capacitor negative connection. Supply voltage input pin. Left channel output for headphone. Connect this pin to CVSS. Charge pump output. FUNCTION
Block Diagram
RIN
ROUT
LIN
LOUT GND PVDD CP+ Shutdown Circuit Power and Depop Circuit Charge Pump
RSD LSD
CP-
GND
PGND
VDD
VSS
CVSS
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APA2178
Typical Application Circuit
1 F
R-Ch Input RIN CiR ROUT LIN LOUT GND Shutdown Control RSD LSD Shutdown Circuit PVDD VDD
Headphone Jack
1 F
L-CH Input CiL
Power and Depop Circuit
Charge Pump
CCPB CP+ 1F /X5R CCPF 1F/X5R CP-
GND PGND VDD
VDD CS 1F/X5R
VSS
VSS CVSS CCPO 1F/X5R
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APA2178
Function Description
VDD VOUT VDD/2
voltage PVDD to provide maximum device performance. By switching the both RSD and LSD pins to low level, the amplifier enters a low-consumption current circumstance, with charge pump disabled, and very small IDD for the APA2178. The charge pump is enabled once either RSD or LSD pin is pulled to high. In normal operating, the APA2178 RSD and LSD pins should be pulled to high level to keep the IC out of the shutdown mode. The RSD
GND Conventional Headphone amplifier VDD
and LSD pins should be tied to a definite voltage to avoid unwanted mode changing.
VOUT GND
VSS Cap-free Headphone amplifier
Figure 1. Cap-free Operation The APA2178 is a stereo, fixed gain, and cap-free headphone driver. The gain is set by internal resistors, input resistors (R i), and feedback resistors (R f) with -1.5V/V (See Typical Application Circuit). The APA2178 headphone drivers use a charge pump to invert the positive power supply (PVDD) to negative power supply (CVSS), see figure 1. The headphone drivers operate at this bipolar power supply (VDD and VSS) and the outputs reference refers to the ground. This feature eliminates the output capacitors which are used in conventional single-ended headphone amplifiers. Compared with the single power supply amplifiers, the power supply voltage is almost double. Shutdown Function In order to reduce power consumption, the APA2178 contains two shutdown signal input pins (LSD for left channel and RSD for right channel) to allow the respective shutdown which turns off the bias current of the amplifier. This shutdown feature turns the amplifier off when logic low is placed on the RSD or LSD pin for the APA2178. The trigger point between a logic high and a logic low level is typically 0.6VDD and 0.3VDD. It is highly recommended to switch between the ground and the supply
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APA2178
Application Information
Charge Pump Flying Capacitor (CCPF) The flying capacitor (CCPF) affects the load transient of the charge pump. If the capacitor' value is too small, and s then this increases charge pump' output resistance and s degrades the performance of headphone amplifier. Increasing the flying capacitor' value improves the load s transient of charge pump. It is recommend to use the low E S R c e r am i c c apac i t o rs ( X5 R o r X7R t yp e i s recommended) above 1F. Charge Pump Output Capacitor (CCPO) The charge pump needs an output capacitor(CCPO) to filter the negative output current pulse flowing into CVSS pin as well as reduces the output voltage ripple(CVSS). The capacitor also sucks in surge current flowing from the VSS pin, the negative power input pin for the amplifiers. The output ripple is determined by the capacitance, ESR, and current ripple of the output capacitor. Increasing the value of output capacitor and decreasing the ESR can reduce the voltage ripple. Using a low-ESR ceramic capacitor greater than 1F is recommended. For reducing the parasitic inductance and improving the noise decoupling, place the capacitor near the CVSS and PGND pins as close as possible. Charge Pump Bypass Capacitor (CCPB) The bypass capacitor(CCPB) connected with PVDD pin supplies the charge pump with surge current as well as reduces the voltage ripple on PVDD pin. Using a low-ESR ceramic capacitor 1F(typical) is recommended. For reducing the parasitic inductance and improving the noise decoupling, place the capacitor near the PVDD and PGND pins as close as possible. Input Capacitor (Ci) In the typical application, an input capacitor (Ci) is required to allow the amplifier to bias the input signal to the proper DC level for optimum operation. In this case, Ci and the input impedance Ri from a high-pass filter with the cutoff frequency are determined in the following equation: fC(highpass) = 1 2RiCi (1) The value of Ci must be considered carefully because it directly affects the low frequency performance of the circuit. Consider the example where Ri is 14k and the specification that calls for a flat bass response down to 10Hz. The equation is reconfigured as below: Ci = 1 2RifC (2)
When input resistance variation is considered, the Ci is 1F. Therefore, a value in the range of 1F to 2.2F would be chosen. A further consideration for this capacitor is the leakage path from the input source through the input network (Ri + Rf, Ci) to the load. This leakage current creates a DC offset voltage at the input to the amplifier that reduces useful headroom, especially in high gain applications. For this reason, a lowleakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the negative side of the capacitor should face the amplifiers' inputs in most applications because the DC level of the amplifiers' inputs are held at 0V. Please note that it is important to confirm the capacitor polarity in the application. Power Supply Decoupling (CS) The APA2178 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (THD+N) as low as possible. Power supply decoupling also prevents the oscillations being caused by long lead length between the amplifier and the speaker. The optimum decoupling is achieved by using two different types of capacitor that target on different types of noise on the power supply leads. For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series- resistance (ESR) ceramic capacitor, typically 0.1F, is placed as close as possible to the device VDD lead for the best performance. For filtering lower frequency noise signals, a large aluminum electrolytic capacitor of 10F or greater placed near the audio power amplifier is recommended. Thermal Consideration Linear power amplifiers dissipate a significant amount of heat in the package in normal operating condition. The first consideration to calculate maximum ambient tem24 www.anpec.com.tw
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
APA2178
Application Information (Cont.)
Thermal Consideration (Cont.) peratures is the numbers from the Power Dissipation vs. Output Power graphs are per channel values, so the dissipation of the IC heat needs to be doubled for two-channel operation. Given JA, the maximum allowable junction temperature (TJMax), the total internal dissipation (PD), and the maximum ambient temperature can be calculated with the following equation. The maximum recommended junction temperature for the APA2178 is 150oC. The internal dissipation figures are taken from the Power Dissipation vs. Output Power graphs. The APA2178 is designed with a thermal shutdown protection that turns the device off when the junction temperature surpasses 150C to prevent damaging the IC. Layout Consideration 1. All components should be placed close to the APA2178. For example, the input capacitor (CiR, CiL) should be close to APA2178 input pins to avoid causing noise coupling to APA2178 high impedance inputs; the decoupling capacitor (C S ) should be placed by the APA2178 power pin to decouple the power rail noise. 2. The output traces should be short, wide (>50mil), and symmetric. 3. The input trace should be short and symmetric. 4. The power trace width should be greater than 50mil. 5. The input trace and output trace should be away from CCPF and CCPB possible.
CiR CiL PIN A1 output trace
16 x 0.275mm
0.5mm
0.5mm
Figure 2. WLCSP2x2-16 land pattern recommendation
CCPF
CCPB
Figure 3. APA2178 Layout Suggestion
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APA2178
Package Information
WLCSP2x2-16
PIN 1
D A
E
A1
e/2 S Y M B O L A A1 b D E e 0.15 0.25 1.97 1.97 0.50 BSC
e WLCSP2x2-16
MILLIMETERS MIN. MAX. 0.625 0.35 0.35 2.03 2.03 0.006 0.010 0.077 0.077 MIN.
e
e/2
b
INCHES MAX. 0.025 0.014 0.014 0.080 0.080 0.020 BSC
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APA2178
Carrier Tape & Reel Dimensions
OD0 P0 P2 P1 A E1 F K0 B SECTION A-A T B0 A0 OD1 B A SECTION B-B
d
Application
A 178.0O .00 2
H 50 MIN. P1 4.0O .10 0
H A
T1
T1 8.4+2.00 -0.00 P2 2.0O .05 0
C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00
d 1.5 MIN. D1 1.5 MIN.
D 20.2 MIN. T 0.6+0.00 -0.40
W 8.0O .30 0 A0 2.20O .20 0
W
E1 1.75O .10 0 B0 2.20O .20 0
F 3.5O .05 0 K0 0.90O .20 0 (mm)
WLCSP2x2-16
P0 4.0O .10 0
Devices Per Unit
Package Type WLCSP2x2-16 Unit Tape & Reel Quantity 3000
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APA2178
Taping Direction Information
WLCSP2x2-16
USER DIRECTION OF FEED
Classification Profile
Copyright (c) ANPEC Electronics Corp. Rev. A.3 - Jul., 2009
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APA2178
Classification Reflow Profiles
Profile Feature Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time (tP)** within 5C of the specified classification temperature (Tc) Average ramp-down rate (Tp to Tsmax) Time 25C to peak temperature Sn-Pb Eutectic Assembly 100 C 150 C 60-120 seconds 3 C/second max. 183 C 60-150 seconds See Classification Temp in table 1 20** seconds 6 C/second max. 6 minutes max. Pb-Free Assembly 150 C 200 C 60-120 seconds 3C/second max. 217 C 60-150 seconds See Classification Temp in table 2 30** seconds 6 C/second max. 8 minutes max.
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Table 1. SnPb Eutectic Process - Classification Temperatures (Tc) Package Thickness <2.5 mm 2.5 mm
3
3 3
Volume mm <350 235 C 220 C
Volume mm 350 220 C 220 C
3
Table 2. Pb-free Process - Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm - 2.5 mm 2.5 mm Volume mm <350 260 C 260 C 250 C Volume mm 350-2000 260 C 250 C 245 C Volume mm >2000 260 C 245 C 245 C
3
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Description 5 Sec, 245C 1000 Hrs, Bias @ 125C 168 Hrs, 100%RH, 2atm, 121C 500 Cycles, -65C~150C VHBMU2KV VMMU200V 10ms, 1trU 100mA
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APA2178
Customer Service
Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838
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